Dresden and Grenoble are collaborating on the development of innovative memory chips

With this success, the pilot line—launched in December 2023 and coordinated by CEA-Leti—has demonstrated that complex wafer processes can be shared and collaboratively developed between two leading research institutes in Europe.

The collaboration focuses on the fabrication and electrical characterization of ferroelectric capacitor stacks made of hafnium-zirconia (HZO). Utilizing the combined 300-mm CMOS cleanroom capabilities of both institutes, the wafers were exchanged in short process loops to enable a joint evaluation of materials, electrode configurations, and device behavior. During the successful processing at two sites, the protocols for wafer exchange and contamination control implemented in the pilot line were also validated, demonstrating that even complex material stacks can be reliably processed on all wafers across different cleanrooms.

• From Lab to Fab – Faster Progress Toward System-Level Applications

“The successful wafer exchange is an important step toward a joint European material testing platform for ferroelectric memory,” says Dr. Wenke Weinreich, Head of the Center for Nanoelectronic Technologies (CNT) at the Fraunhofer Institute for Photonic Microsystems IPMS in Dresden and a member of the 11-member FAMES consortium. “By combining our process expertise with CEA-Leti’s CMOS integration capabilities, the pilot line offers a high-performance environment for evaluating new ferroelectric devices and accelerates their path to system-level applications.”

• Seamless wafer exchange between FAMES sites

““This first exchange between CEA-Leti and Fraunhofer IPMS demonstrates that shared process flows, test vehicles, and characterization environments can function seamlessly between FAMES sites,” explains project coordinator Dominique Noguet of CEA-Leti. “Establishing reliable wafer loops between leading research institutes is essential for accelerating the development of ferroelectric memory.”

Looking ahead, the wafer loops lay the groundwork for broader collaboration in development. In the next phases, HfO₂-based ferroelectric stacks from Fraunhofer IPMS will be integrated into CEA-Leti CMOS processes, followed by array-level evaluations of new memory technologies. The roadmap also includes studies on electrode process variations, long-term reliability, and back-end-of-line integration approaches.

In parallel, Fraunhofer IPMS recently completed a first chip tape-out using GlobalFoundries’ 22-nm FDX® technology and has begun research on algorithmic AI compute-in-memory accelerator architectures based on these ferroelectric technologies.

Together, these efforts contribute to the core mission of the FAMES pilot line: providing a unified European platform for the development and validation of new memory technologies—including OxRAM, MRAM, FeRAM, and FeFET. By promoting joint materials development and standardized characterization, the FAMES pilot line aims to strengthen Europe’s capabilities to develop and manufacture the next-generation, energy-efficient chip architectures required for the future of data processing.