Fraunhofer IPMS Dresden Is Developing High-Density Chiplet Systems at the Wafer Level

Breakthrough in chip manufacturing: As part of the European APECS pilot line, the Fraunhofer Institute for Photonic Microsystems (IPMS) in Dresden has developed a method that allows different chip components to be fused almost seamlessly into a single unit.

3D printing of a demonstrator for quasi-monolithic integration with a chiplet in the pocket.
Source Fraunhofer IPMS

By precisely embedding small chiplets into special silicon pockets, it has been possible for the first time to combine the advantages of a compact single chip with the flexibility of modular systems. This success demonstrates the feasibility of so-called quasi-monolithic integration (QMI) and bridges the gap between traditional chip packaging and state-of-the-art semiconductor manufacturing.

The increasing demands for complexity, computing power, and system compactness call for radically new approaches in semiconductor manufacturing. The vision for future-proof microelectronics envisions systems that are as powerful as a single chip, yet offer the flexibility of a modular building block. Within APECS, the pilot line for “Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems,” Fraunhofer IPMS is therefore pursuing the approach of quasi-monolithic integration (QMI): The goal is to combine different chip components—such as control electronics, sensors, or microelectromechanical systems (MEMS)—at the wafer level so efficiently that the advantages of a compact single chip are preserved.

  • From Theory to Reality: Pockets, Placement, and Embedding

Researchers at Fraunhofer IPMS have now successfully demonstrated the first critical milestone of the QMI roadmap. “The basis of QMI is silicon wafers with structured recesses (pockets). For the first time, dummy chiplets were inserted into these so-called pocket wafers, and the surface was leveled with a passivation layer for subsequent back-end-of-line wiring,” explains Dr. Lukas Lorenz, group leader at Fraunhofer IPMS. “This creates a nearly monolithic system architecture that combines the highest integration density with modular scalability.” This success paves the way for the industrial maturity of the entire process chain for future industrial applications.

  • Technological advantages: Higher system performance with maximum compactness

QMI technology offers significant advantages over conventional packaging methods. The basis for this is the arrangement of the chiplets on an active or passive wafer substrate with a shared interconnect stack. Since the interconnections are then made within the front-end-of-line, far higher connection densities can be achieved than with traditional methods. This leads to the following benefits:

  1. Higher performance: Shorter signal paths reduce losses and latencies and increase processing speed at the system level.
  2. Reliability: The reduction in mechanical interfaces increases the robustness and service life of the systems.
  3. Compactness: QMI saves a significant amount of space, as the elements are integrated in a nearly monolithic manner.
  4. Cost efficiency: The combination of modular chiplet approaches enables cost-effective high-density integration while ensuring short innovation cycles and high scalability.

These advantages make quasi-monolithic integration ideal for innovations such as highly integrated SoCs (System-on-Chip) for AI applications (sensor AI) as well as intelligent transceivers with high bandwidth.

  • Outlook: Industrial Applications

Dr. Lukas Lorenz emphasizes: “Although the current demonstrator is based on dummy structures, the process chain is transferable to real customer applications. This enables a scalable integration architecture for future heterogeneous system solutions.” Fraunhofer IPMS is thus targeting industrial partners whose products can benefit from high-density integration of different technologies. The approaches developed within the framework of APECS thus form the basis for promptly transferring QMI to production-oriented manufacturing environments. Further information is available on the Fraunhofer IPMS website.

APECS is co-funded by the Chips Joint Undertaking and through national funding from Belgium, Germany, Finland, France, Greece, Austria, Portugal, and Spain as part of the “Chips for Europe” initiative. Total funding for the APECS pilot line amounts to 730 million euros over 4.5 years.